briefing untuk assignment:
implement 2's complement 16 bit CLA Adder using hierarchical methodology and simulate it using MAXPLUS 2 10.2 baseline
1. Draw and simulate the generation circuit
-create a symbol for this circuit
-Draw and simulate the carry generation citcuit using the CLA tech.
-create the output Pgroup and Ggroup
-create overflow output
-draw and simulate the 4 bit digit CLA Adder using SUM and CLA
2. implement and simulate 16 bit CLA Adder using 4 bit CLA
3. Show the timing waveform for all the simulation pro esp. for 16 bit Adder. Determine weather the design is correct or not by using the waveform.
u have 5 minutes to present it and answer a few questions..........
(5 marks)
inapaisey: idea tanak datang lak time mcm ni. maxplus pun tok download lagi..aku ade 10.1 lect nak 10.2..mcm2..altera tak anta balas emel aku lagi ni..mcmaner aku nak download?
